author vrooomy <vj.bro.833@gmail.com> 1773655621 +0530
committer vrooomy <vj.bro.833@gmail.com> 1774357668 +0530
added SIMD support for 64 bit float and fallback for 64 bit int
removed trailing white-spaces
add SIMD optimization for 32 unsinged int and clean fallback for 64u and 64s
add SIMD support for 32u and fallback for 64u and 64s
changed CalibrateDebevec test threshold to 0.25 (same as ARM) for IPP=NO
relaxed threshold to 0.22
conflict resolved