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Merge pull request #30000 from Xlawy:opt/rvv-fp32-l2-widening-fma
core: optimize RVV FP32 L2 norm with widening FMA
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@@ -342,8 +342,7 @@ struct NormL2_RVV<float, double> {
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for (int i = 0; i < n; i += vl) {
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for (int i = 0; i < n; i += vl) {
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vl = __riscv_vsetvl_e32m4(n - i);
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vl = __riscv_vsetvl_e32m4(n - i);
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auto v = __riscv_vle32_v_f32m4(src + i, vl);
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auto v = __riscv_vle32_v_f32m4(src + i, vl);
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auto v_mul = __riscv_vfwmul(v, v, vl);
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s = __riscv_vfwmacc_tu(s, v, v, vl);
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s = __riscv_vfadd_tu(s, s, v_mul, vl);
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}
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}
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return __riscv_vfmv_f(__riscv_vfredosum(s, __riscv_vfmv_s_f_f64m1(0, __riscv_vsetvlmax_e64m1()), vlmax));
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return __riscv_vfmv_f(__riscv_vfredosum(s, __riscv_vfmv_s_f_f64m1(0, __riscv_vsetvlmax_e64m1()), vlmax));
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}
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}
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@@ -933,8 +932,7 @@ struct MaskedNormL2_RVV<float, double> {
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auto v = __riscv_vle32_v_f32m4(src + i, vl);
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auto v = __riscv_vle32_v_f32m4(src + i, vl);
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auto m = __riscv_vle8_v_u8m1(mask + i, vl);
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auto m = __riscv_vle8_v_u8m1(mask + i, vl);
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auto b = __riscv_vmsne(m, 0, vl);
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auto b = __riscv_vmsne(m, 0, vl);
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auto v_mul = __riscv_vfwmul(b, v, v, vl);
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s = __riscv_vfwmacc_tumu(b, s, v, v, vl);
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s = __riscv_vfadd_tumu(b, s, s, v_mul, vl);
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}
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}
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} else {
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} else {
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for (int cn_index = 0; cn_index < cn; cn_index++) {
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for (int cn_index = 0; cn_index < cn; cn_index++) {
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@@ -944,8 +942,7 @@ struct MaskedNormL2_RVV<float, double> {
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auto v = __riscv_vlse32_v_f32m4(src + cn * i + cn_index, sizeof(float) * cn, vl);
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auto v = __riscv_vlse32_v_f32m4(src + cn * i + cn_index, sizeof(float) * cn, vl);
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auto m = __riscv_vle8_v_u8m1(mask + i, vl);
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auto m = __riscv_vle8_v_u8m1(mask + i, vl);
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auto b = __riscv_vmsne(m, 0, vl);
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auto b = __riscv_vmsne(m, 0, vl);
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auto v_mul = __riscv_vfwmul(b, v, v, vl);
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s = __riscv_vfwmacc_tumu(b, s, v, v, vl);
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s = __riscv_vfadd_tumu(b, s, s, v_mul, vl);
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}
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}
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}
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}
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}
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}
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