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Add Loongson Advanced SIMD Extension support: -DCPU_BASELINE=LASX

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* Add Loongson Advanced SIMD Extension support: -DCPU_BASELINE=LASX
* Add resize.lasx.cpp for Loongson SIMD acceleration
* Add imgwarp.lasx.cpp for Loongson SIMD acceleration
* Add LASX acceleration support for dnn/conv
* Add CV_PAUSE(v) for Loongarch
* Set LASX by default on Loongarch64
* LoongArch: tune test threshold for Core/HAL.mat_decomp/15

Co-authored-by: shengwenxue <shengwenxue@loongson.cn>
This commit is contained in:
wxshengandshengwenxue authored and GitHub committed 2022-09-10 09:39:43 +03:00
1 parent 866191478f
commit 4154bd0667
24 files changed
+5071 -6
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modules/core/src/system.cpp
+6
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@@ -434,6 +434,8 @@ struct HWFeatures
g_hwFeatureNames[CPU_AVX512_ICL] = "AVX512-ICL";
g_hwFeatureNames[CPU_RVV] = "RVV";
g_hwFeatureNames[CPU_LASX] = "LASX";
}
void initialize(void)
@@ -689,6 +691,10 @@ struct HWFeatures
have[CV_CPU_RVV] = true;
#endif
#if defined __loongarch_asx
have[CV_CPU_LASX] = true;
#endif
bool skip_baseline_check = false;
#ifndef NO_GETENV
if (getenv("OPENCV_SKIP_CPU_BASELINE_CHECK"))