Refactoring
This commit is contained in:
@@ -55,6 +55,8 @@ void SVC_Handler(void);
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void DebugMon_Handler(void);
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void PendSV_Handler(void);
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void SysTick_Handler(void);
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void DMA1_Channel2_IRQHandler(void);
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void DMA1_Channel3_IRQHandler(void);
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/* USER CODE BEGIN EFP */
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/* USER CODE END EFP */
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@@ -26,7 +26,14 @@
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN PTD */
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#define CS1_ON() HAL_GPIO_WritePin(CS1_GPIO_Port, CS1_Pin, GPIO_PIN_SET)
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#define CS1_OFF() HAL_GPIO_WritePin(CS1_GPIO_Port, CS1_Pin, GPIO_PIN_RESET)
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#define CS2_ON() HAL_GPIO_WritePin(CS2_GPIO_Port, CS2_Pin, GPIO_PIN_SET)
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#define CS2_OFF() HAL_GPIO_WritePin(CS2_GPIO_Port, CS2_Pin, GPIO_PIN_RESET)
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#define CS3_ON() HAL_GPIO_WritePin(CS3_GPIO_Port, CS3_Pin, GPIO_PIN_SET)
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#define CS3_OFF() HAL_GPIO_WritePin(CS3_GPIO_Port, CS3_Pin, GPIO_PIN_RESET)
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#define RESET_ON() HAL_GPIO_WritePin(RESET_GPIO_Port, RESET_Pin, GPIO_PIN_SET)
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#define RESET_OFF() HAL_GPIO_WritePin(RESET_GPIO_Port, RESET_Pin, GPIO_PIN_RESET)
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/* USER CODE END PTD */
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/* Private define ------------------------------------------------------------*/
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@@ -40,6 +47,8 @@
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/* Private variables ---------------------------------------------------------*/
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SPI_HandleTypeDef hspi1;
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DMA_HandleTypeDef hdma_spi1_rx;
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DMA_HandleTypeDef hdma_spi1_tx;
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UART_HandleTypeDef huart1;
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@@ -51,6 +60,7 @@ UART_HandleTypeDef huart1;
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void SystemClock_Config(void);
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static void MX_GPIO_Init(void);
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static void MX_SPI1_Init(void);
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static void MX_DMA_Init(void);
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static void MX_USART1_UART_Init(void);
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/* USER CODE BEGIN PFP */
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@@ -90,9 +100,10 @@ int main(void)
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/* Initialize all configured peripherals */
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MX_GPIO_Init();
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MX_SPI1_Init();
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MX_DMA_Init();
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MX_USART1_UART_Init();
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/* USER CODE BEGIN 2 */
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RESET_ON();
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/* USER CODE END 2 */
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/* Infinite loop */
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@@ -223,6 +234,25 @@ static void MX_USART1_UART_Init(void)
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}
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/**
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* Enable DMA controller clock
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*/
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static void MX_DMA_Init(void)
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{
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/* DMA controller clock enable */
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__HAL_RCC_DMA1_CLK_ENABLE();
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/* DMA interrupt init */
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/* DMA1_Channel2_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
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/* DMA1_Channel3_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Channel3_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(DMA1_Channel3_IRQn);
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}
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/**
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* @brief GPIO Initialization Function
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* @param None
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@@ -237,31 +267,24 @@ static void MX_GPIO_Init(void)
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__HAL_RCC_GPIOB_CLK_ENABLE();
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/*Configure GPIO pin Output Level */
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HAL_GPIO_WritePin(GPIOA, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3, GPIO_PIN_RESET);
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HAL_GPIO_WritePin(GPIOA, CS1_Pin|CS2_Pin|CS3_Pin, GPIO_PIN_SET);
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/*Configure GPIO pin Output Level */
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HAL_GPIO_WritePin(GPIOB, GPIO_PIN_0, GPIO_PIN_RESET);
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HAL_GPIO_WritePin(RESET_GPIO_Port, RESET_Pin, GPIO_PIN_RESET);
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/*Configure GPIO pin : PA1 */
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GPIO_InitStruct.Pin = GPIO_PIN_1;
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/*Configure GPIO pins : CS1_Pin CS2_Pin CS3_Pin */
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GPIO_InitStruct.Pin = CS1_Pin|CS2_Pin|CS3_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/*Configure GPIO pins : PA2 PA3 */
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GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/*Configure GPIO pin : PB0 */
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GPIO_InitStruct.Pin = GPIO_PIN_0;
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/*Configure GPIO pin : RESET_Pin */
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GPIO_InitStruct.Pin = RESET_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
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HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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HAL_GPIO_Init(RESET_GPIO_Port, &GPIO_InitStruct);
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}
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@@ -23,6 +23,9 @@
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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extern DMA_HandleTypeDef hdma_spi1_rx;
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extern DMA_HandleTypeDef hdma_spi1_tx;
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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@@ -106,6 +109,41 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
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GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* SPI1 DMA Init */
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/* SPI1_RX Init */
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hdma_spi1_rx.Instance = DMA1_Channel2;
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hdma_spi1_rx.Init.Request = DMA_REQUEST_1;
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hdma_spi1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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hdma_spi1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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hdma_spi1_rx.Init.MemInc = DMA_MINC_ENABLE;
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hdma_spi1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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hdma_spi1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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hdma_spi1_rx.Init.Mode = DMA_NORMAL;
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hdma_spi1_rx.Init.Priority = DMA_PRIORITY_LOW;
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if (HAL_DMA_Init(&hdma_spi1_rx) != HAL_OK)
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{
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Error_Handler();
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}
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__HAL_LINKDMA(hspi,hdmarx,hdma_spi1_rx);
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/* SPI1_TX Init */
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hdma_spi1_tx.Instance = DMA1_Channel3;
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hdma_spi1_tx.Init.Request = DMA_REQUEST_1;
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hdma_spi1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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hdma_spi1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
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hdma_spi1_tx.Init.MemInc = DMA_MINC_ENABLE;
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hdma_spi1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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hdma_spi1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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hdma_spi1_tx.Init.Mode = DMA_NORMAL;
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hdma_spi1_tx.Init.Priority = DMA_PRIORITY_LOW;
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if (HAL_DMA_Init(&hdma_spi1_tx) != HAL_OK)
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{
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Error_Handler();
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}
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__HAL_LINKDMA(hspi,hdmatx,hdma_spi1_tx);
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/* USER CODE BEGIN SPI1_MspInit 1 */
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/* USER CODE END SPI1_MspInit 1 */
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@@ -136,6 +174,9 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
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*/
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HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
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/* SPI1 DMA DeInit */
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HAL_DMA_DeInit(hspi->hdmarx);
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HAL_DMA_DeInit(hspi->hdmatx);
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/* USER CODE BEGIN SPI1_MspDeInit 1 */
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/* USER CODE END SPI1_MspDeInit 1 */
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@@ -55,7 +55,8 @@
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern DMA_HandleTypeDef hdma_spi1_rx;
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extern DMA_HandleTypeDef hdma_spi1_tx;
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/* USER CODE BEGIN EV */
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/* USER CODE END EV */
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@@ -198,6 +199,34 @@ void SysTick_Handler(void)
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/* please refer to the startup file (startup_stm32l4xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles DMA1 channel2 global interrupt.
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*/
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void DMA1_Channel2_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
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/* USER CODE END DMA1_Channel2_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_spi1_rx);
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/* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
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/* USER CODE END DMA1_Channel2_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 channel3 global interrupt.
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*/
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void DMA1_Channel3_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel3_IRQn 0 */
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/* USER CODE END DMA1_Channel3_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_spi1_tx);
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/* USER CODE BEGIN DMA1_Channel3_IRQn 1 */
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/* USER CODE END DMA1_Channel3_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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155
Core/Src/syscalls.c
Normal file
155
Core/Src/syscalls.c
Normal file
@@ -0,0 +1,155 @@
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/**
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******************************************************************************
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* @file syscalls.c
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* @author Auto-generated by STM32CubeIDE
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* @brief STM32CubeIDE Minimal System calls file
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*
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* For more information about which c-functions
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* need which of these lowlevel functions
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* please consult the Newlib libc-manual
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2021 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Includes */
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#include <sys/stat.h>
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#include <stdlib.h>
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#include <errno.h>
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#include <stdio.h>
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#include <signal.h>
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#include <time.h>
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#include <sys/time.h>
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#include <sys/times.h>
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/* Variables */
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extern int __io_putchar(int ch) __attribute__((weak));
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extern int __io_getchar(void) __attribute__((weak));
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char *__env[1] = { 0 };
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char **environ = __env;
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/* Functions */
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void initialise_monitor_handles()
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{
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}
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int _getpid(void)
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{
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return 1;
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}
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int _kill(int pid, int sig)
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{
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errno = EINVAL;
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return -1;
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}
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void _exit (int status)
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{
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_kill(status, -1);
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while (1) {} /* Make sure we hang here */
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}
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__attribute__((weak)) int _read(int file, char *ptr, int len)
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{
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int DataIdx;
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for (DataIdx = 0; DataIdx < len; DataIdx++)
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{
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*ptr++ = __io_getchar();
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}
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return len;
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}
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__attribute__((weak)) int _write(int file, char *ptr, int len)
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{
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int DataIdx;
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for (DataIdx = 0; DataIdx < len; DataIdx++)
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{
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__io_putchar(*ptr++);
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}
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return len;
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}
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int _close(int file)
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{
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return -1;
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}
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int _fstat(int file, struct stat *st)
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{
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st->st_mode = S_IFCHR;
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return 0;
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}
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int _isatty(int file)
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{
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return 1;
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}
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int _lseek(int file, int ptr, int dir)
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{
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return 0;
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}
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int _open(char *path, int flags, ...)
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{
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/* Pretend like we always fail */
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return -1;
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}
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int _wait(int *status)
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{
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errno = ECHILD;
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return -1;
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}
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int _unlink(char *name)
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{
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errno = ENOENT;
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return -1;
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}
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int _times(struct tms *buf)
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{
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return -1;
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}
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|
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int _stat(char *file, struct stat *st)
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||||
{
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st->st_mode = S_IFCHR;
|
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return 0;
|
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}
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|
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int _link(char *old, char *new)
|
||||
{
|
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errno = EMLINK;
|
||||
return -1;
|
||||
}
|
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|
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int _fork(void)
|
||||
{
|
||||
errno = EAGAIN;
|
||||
return -1;
|
||||
}
|
||||
|
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int _execve(char *name, char **argv, char **env)
|
||||
{
|
||||
errno = ENOMEM;
|
||||
return -1;
|
||||
}
|
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79
Core/Src/sysmem.c
Normal file
79
Core/Src/sysmem.c
Normal file
@@ -0,0 +1,79 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file sysmem.c
|
||||
* @author Generated by STM32CubeIDE
|
||||
* @brief STM32CubeIDE System Memory calls file
|
||||
*
|
||||
* For more information about which C functions
|
||||
* need which of these lowlevel functions
|
||||
* please consult the newlib libc manual
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes */
|
||||
#include <errno.h>
|
||||
#include <stdint.h>
|
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|
||||
/**
|
||||
* Pointer to the current high watermark of the heap usage
|
||||
*/
|
||||
static uint8_t *__sbrk_heap_end = NULL;
|
||||
|
||||
/**
|
||||
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
|
||||
* and others from the C library
|
||||
*
|
||||
* @verbatim
|
||||
* ############################################################################
|
||||
* # .data # .bss # newlib heap # MSP stack #
|
||||
* # # # # Reserved by _Min_Stack_Size #
|
||||
* ############################################################################
|
||||
* ^-- RAM start ^-- _end _estack, RAM end --^
|
||||
* @endverbatim
|
||||
*
|
||||
* This implementation starts allocating at the '_end' linker symbol
|
||||
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
|
||||
* The implementation considers '_estack' linker symbol to be RAM end
|
||||
* NOTE: If the MSP stack, at any point during execution, grows larger than the
|
||||
* reserved size, please increase the '_Min_Stack_Size'.
|
||||
*
|
||||
* @param incr Memory size
|
||||
* @return Pointer to allocated memory
|
||||
*/
|
||||
void *_sbrk(ptrdiff_t incr)
|
||||
{
|
||||
extern uint8_t _end; /* Symbol defined in the linker script */
|
||||
extern uint8_t _estack; /* Symbol defined in the linker script */
|
||||
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
|
||||
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
|
||||
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
||||
uint8_t *prev_heap_end;
|
||||
|
||||
/* Initialize heap end at first call */
|
||||
if (NULL == __sbrk_heap_end)
|
||||
{
|
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__sbrk_heap_end = &_end;
|
||||
}
|
||||
|
||||
/* Protect heap from growing into the reserved MSP stack */
|
||||
if (__sbrk_heap_end + incr > max_heap)
|
||||
{
|
||||
errno = ENOMEM;
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||||
return (void *)-1;
|
||||
}
|
||||
|
||||
prev_heap_end = __sbrk_heap_end;
|
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__sbrk_heap_end += incr;
|
||||
|
||||
return (void *)prev_heap_end;
|
||||
}
|
||||
449
Core/Startup/startup_stm32l432kcux.s
Normal file
449
Core/Startup/startup_stm32l432kcux.s
Normal file
@@ -0,0 +1,449 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32l432xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32L432xx devices vector table for GCC toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address,
|
||||
* - Configure the clock system
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF1E0F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* Set stack pointer */
|
||||
|
||||
/* Call the clock system initialization function.*/
|
||||
bl SystemInit
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
ldr r0, =_sdata
|
||||
ldr r1, =_edata
|
||||
ldr r2, =_sidata
|
||||
movs r3, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r4, [r2, r3]
|
||||
str r4, [r0, r3]
|
||||
adds r3, r3, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
adds r4, r0, r3
|
||||
cmp r4, r1
|
||||
bcc CopyDataInit
|
||||
|
||||
/* Zero fill the bss segment. */
|
||||
ldr r2, =_sbss
|
||||
ldr r4, =_ebss
|
||||
movs r3, #0
|
||||
b LoopFillZerobss
|
||||
|
||||
FillZerobss:
|
||||
str r3, [r2]
|
||||
adds r2, r2, #4
|
||||
|
||||
LoopFillZerobss:
|
||||
cmp r2, r4
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex-M4. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_PVM_IRQHandler
|
||||
.word TAMP_STAMP_IRQHandler
|
||||
.word RTC_WKUP_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_IRQHandler
|
||||
.word CAN1_TX_IRQHandler
|
||||
.word CAN1_RX0_IRQHandler
|
||||
.word CAN1_RX1_IRQHandler
|
||||
.word CAN1_SCE_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word TIM1_BRK_TIM15_IRQHandler
|
||||
.word TIM1_UP_TIM16_IRQHandler
|
||||
.word TIM1_TRG_COM_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word SPI1_IRQHandler
|
||||
.word 0
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word 0
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SPI3_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word TIM6_DAC_IRQHandler
|
||||
.word TIM7_IRQHandler
|
||||
.word DMA2_Channel1_IRQHandler
|
||||
.word DMA2_Channel2_IRQHandler
|
||||
.word DMA2_Channel3_IRQHandler
|
||||
.word DMA2_Channel4_IRQHandler
|
||||
.word DMA2_Channel5_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word COMP_IRQHandler
|
||||
.word LPTIM1_IRQHandler
|
||||
.word LPTIM2_IRQHandler
|
||||
.word USB_IRQHandler
|
||||
.word DMA2_Channel6_IRQHandler
|
||||
.word DMA2_Channel7_IRQHandler
|
||||
.word LPUART1_IRQHandler
|
||||
.word QUADSPI_IRQHandler
|
||||
.word I2C3_EV_IRQHandler
|
||||
.word I2C3_ER_IRQHandler
|
||||
.word SAI1_IRQHandler
|
||||
.word 0
|
||||
.word SWPMI1_IRQHandler
|
||||
.word TSC_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word RNG_IRQHandler
|
||||
.word FPU_IRQHandler
|
||||
.word CRS_IRQHandler
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_PVM_IRQHandler
|
||||
.thumb_set PVD_PVM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_IRQHandler
|
||||
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_TX_IRQHandler
|
||||
.thumb_set CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX0_IRQHandler
|
||||
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_TIM15_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_TIM16_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel1_IRQHandler
|
||||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel2_IRQHandler
|
||||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel3_IRQHandler
|
||||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel4_IRQHandler
|
||||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel5_IRQHandler
|
||||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP_IRQHandler
|
||||
.thumb_set COMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM1_IRQHandler
|
||||
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM2_IRQHandler
|
||||
.thumb_set LPTIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_IRQHandler
|
||||
.thumb_set USB_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel6_IRQHandler
|
||||
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel7_IRQHandler
|
||||
.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPUART1_IRQHandler
|
||||
.thumb_set LPUART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak QUADSPI_IRQHandler
|
||||
.thumb_set QUADSPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI1_IRQHandler
|
||||
.thumb_set SAI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SWPMI1_IRQHandler
|
||||
.thumb_set SWPMI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TSC_IRQHandler
|
||||
.thumb_set TSC_IRQHandler,Default_Handler
|
||||
|
||||
.weak RNG_IRQHandler
|
||||
.thumb_set RNG_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRS_IRQHandler
|
||||
.thumb_set CRS_IRQHandler,Default_Handler
|
||||
|
||||
Reference in New Issue
Block a user